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Searched refs:SYSMPU_CESR_VLD_MASK (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/sysmpu/
Dfsl_sysmpu.h273 base->CESR |= SYSMPU_CESR_VLD_MASK; in SYSMPU_Enable()
277 base->CESR &= ~SYSMPU_CESR_VLD_MASK; in SYSMPU_Enable()
/hal_nxp-3.6.0/s32/mcux/devices/S32K146/
DS32K146_device.h45 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
51 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h11229 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
11235 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h17142 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
17148 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h15934 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
15940 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h15930 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
15936 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h18142 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
18148 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h18148 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
18154 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h17530 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
17536 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34Z7/
DMKM34Z7.h17567 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
17573 …MPU_CESR_VLD(x) (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM35Z7/
DMKM35Z7.h17442 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
17448 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h21276 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
21282 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h23087 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
23093 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h23133 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
23139 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h24741 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
24747 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h23403 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
23409 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h26507 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
26513 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h24383 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
24389 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h25878 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
25884 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h23038 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
23044 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h23040 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
23046 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h27721 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
27727 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h27721 #define SYSMPU_CESR_VLD_MASK (0x1U) macro
27727 … (((uint32_t)(((uint32_t)(x)) << SYSMPU_CESR_VLD_SHIFT)) & SYSMPU_CESR_VLD_MASK)