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Searched refs:SIM_SOPT8_FTM0OCH4SRC_MASK (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/boards/hvpkv11z75m/project_template/
Dpin_mux.c168 …SK | SIM_SOPT8_FTM0OCH2SRC_MASK | SIM_SOPT8_FTM0OCH3SRC_MASK | SIM_SOPT8_FTM0OCH4SRC_MASK | SIM_SO… in MB_InitMC_PWMPins()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h8473 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
8479 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h8513 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
8519 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h8434 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
8440 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h9372 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
9378 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h9254 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
9260 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h10160 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
10166 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h10322 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
10328 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h10612 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
10618 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h10475 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
10481 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h11593 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
11599 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h11893 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
11899 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h22657 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
22663 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h21828 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
21834 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h24423 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
24429 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h22801 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
22807 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h23967 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
23973 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h21405 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
21411 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h21407 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
21413 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h25802 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
25808 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h25802 #define SIM_SOPT8_FTM0OCH4SRC_MASK (0x100000U) macro
25808 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT8_FTM0OCH4SRC_SHIFT)) & SIM_SOPT8_FTM0OCH4SRC_MASK)