/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_PIT.h | 199 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 202 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_PIT.h | 228 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 231 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE04Z4/ |
D | MKE04Z4.h | 3718 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 3720 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE02Z4/ |
D | MKE02Z4.h | 3790 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 3792 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE04Z1284/ |
D | MKE04Z1284.h | 3778 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 3780 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE06Z4/ |
D | MKE06Z4.h | 4552 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 4554 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL25Z4/ |
D | MKL25Z4.h | 2966 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 2968 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL17Z644/ |
D | MKL17Z644.h | 5558 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 5560 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL27Z644/ |
D | MKL27Z644.h | 5567 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 5569 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK02F12810/ |
D | MK02F12810.h | 7405 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 7407 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV30F12810/ |
D | MKV30F12810.h | 7410 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 7412 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F12810/ |
D | MKV31F12810.h | 8044 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 8046 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM14ZA5/ |
D | MKM14ZA5.h | 7684 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 7688 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F25612/ |
D | MKV31F25612.h | 8941 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 8943 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F51212/ |
D | MKV31F51212.h | 9187 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 9189 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B11A/ |
D | K32L2B11A.h | 10038 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 10042 #define PIT_CVAL_TVL(x) (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B31A/ |
D | K32L2B31A.h | 10038 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 10042 #define PIT_CVAL_TVL(x) (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B21A/ |
D | K32L2B21A.h | 10038 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 10042 #define PIT_CVAL_TVL(x) (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12810/ |
D | MK22F12810.h | 8783 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 8785 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F25612/ |
D | MK22F25612.h | 9684 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 9686 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F51212/ |
D | MK22F51212.h | 9940 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 9942 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW22D5/ |
D | MKW22D5.h | 5487 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 5489 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW24D5/ |
D | MKW24D5.h | 5487 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 5489 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM33ZA5/ |
D | MKM33ZA5.h | 12389 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 12393 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34ZA5/ |
D | MKM34ZA5.h | 12385 #define PIT_CVAL_TVL_MASK (0xFFFFFFFFU) macro 12389 … (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)
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