Home
last modified time | relevance | path

Searched refs:LLWU_F2_WUF10_MASK (Results 1 – 25 of 31) sorted by relevance

12

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h1801 #define LLWU_F2_WUF10_MASK (0x4U) macro
1803 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h3447 #define LLWU_F2_WUF10_MASK (0x4U) macro
3453 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h3456 #define LLWU_F2_WUF10_MASK (0x4U) macro
3462 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h5868 #define LLWU_F2_WUF10_MASK (0x4U) macro
5874 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h5873 #define LLWU_F2_WUF10_MASK (0x4U) macro
5879 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h5299 #define LLWU_F2_WUF10_MASK (0x4U) macro
5305 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h5904 #define LLWU_F2_WUF10_MASK (0x4U) macro
5910 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h5515 #define LLWU_F2_WUF10_MASK (0x4U) macro
5521 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4_extension.h9357 …value) (LLWU_RMW_F2(base, (LLWU_F2_WUF8_MASK | LLWU_F2_WUF9_MASK | LLWU_F2_WUF10_MASK | LLWU_F2_WU…
9377 …value) (LLWU_RMW_F2(base, (LLWU_F2_WUF9_MASK | LLWU_F2_WUF8_MASK | LLWU_F2_WUF10_MASK | LLWU_F2_WU…
9393 #define LLWU_RD_F2_WUF10(base) ((LLWU_F2_REG(base) & LLWU_F2_WUF10_MASK) >> LLWU_F2_WUF10_SHIFT)
9397 #define LLWU_WR_F2_WUF10(base, value) (LLWU_RMW_F2(base, (LLWU_F2_WUF10_MASK | LLWU_F2_WUF8_MASK | …
9417 …ase, (LLWU_F2_WUF11_MASK | LLWU_F2_WUF8_MASK | LLWU_F2_WUF9_MASK | LLWU_F2_WUF10_MASK | LLWU_F2_WU…
9437 …ase, (LLWU_F2_WUF12_MASK | LLWU_F2_WUF8_MASK | LLWU_F2_WUF9_MASK | LLWU_F2_WUF10_MASK | LLWU_F2_WU…
9457 …ase, (LLWU_F2_WUF13_MASK | LLWU_F2_WUF8_MASK | LLWU_F2_WUF9_MASK | LLWU_F2_WUF10_MASK | LLWU_F2_WU…
9477 …ase, (LLWU_F2_WUF14_MASK | LLWU_F2_WUF8_MASK | LLWU_F2_WUF9_MASK | LLWU_F2_WUF10_MASK | LLWU_F2_WU…
9497 …ase, (LLWU_F2_WUF15_MASK | LLWU_F2_WUF8_MASK | LLWU_F2_WUF9_MASK | LLWU_F2_WUF10_MASK | LLWU_F2_WU…
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h6667 #define LLWU_F2_WUF10_MASK (0x4U) macro
6673 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h6913 #define LLWU_F2_WUF10_MASK (0x4U) macro
6919 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B11A/
DK32L2B11A.h7694 #define LLWU_F2_WUF10_MASK (0x4U) macro
7700 #define LLWU_F2_WUF10(x) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B31A/
DK32L2B31A.h7694 #define LLWU_F2_WUF10_MASK (0x4U) macro
7700 #define LLWU_F2_WUF10(x) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L2B21A/
DK32L2B21A.h7694 #define LLWU_F2_WUF10_MASK (0x4U) macro
7700 #define LLWU_F2_WUF10(x) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h6643 #define LLWU_F2_WUF10_MASK (0x4U) macro
6649 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h7410 #define LLWU_F2_WUF10_MASK (0x4U) macro
7416 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h7666 #define LLWU_F2_WUF10_MASK (0x4U) macro
7672 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h4548 #define LLWU_F2_WUF10_MASK (0x4U) macro
4550 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h4548 #define LLWU_F2_WUF10_MASK (0x4U) macro
4550 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h10220 #define LLWU_F2_WUF10_MASK (0x4U) macro
10226 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h10216 #define LLWU_F2_WUF10_MASK (0x4U) macro
10222 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h11437 #define LLWU_F2_WUF10_MASK (0x4U) macro
11443 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h14245 #define LLWU_F2_WUF10_MASK (0x4U) macro
14251 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h3529 #define LLWU_F2_WUF10_MASK (0x4U) macro
3531 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h16030 #define LLWU_F2_WUF10_MASK (0x4U) macro
16036 …) (((uint8_t)(((uint8_t)(x)) << LLWU_F2_WUF10_SHIFT)) & LLWU_F2_WUF10_MASK)

12