Searched refs:Interrupt (Results 1 – 25 of 233) sorted by relevance
12345678910
5 bool "Designware Interrupt Controller for ACE"10 Designware Interrupt Controller used by ACE.13 bool "Designware Interrupt Controller"18 Designware Interrupt Controller can be used as a 2nd level interrupt26 string "Name for Designware Interrupt Controller"29 Give a name for the instance of Designware Interrupt Controller36 the ISRs for Designware Interrupt Controller are assigned.42 DesignWare Interrupt Controller initialization priority.
6 menu "Interrupt controller drivers"9 bool "ARCv2 Interrupt Unit"20 bool "SweRV EH1 Programmable Interrupt Controller (PIC)"24 Programmable Interrupt Controller for the SweRV EH1 RISC-V CPU.27 bool "VexRiscv LiteX Interrupt controller"41 int "Interrupt controller init priority"44 Interrupt controller device initialization priority.49 int "XEX GIRQ Interrupt controller init priority"52 XEC GIRQ Interrupt controller device initialization priority.
5 bool "WCH Programmable Fast Interrupt Controller (PFIC)"9 Interrupt controller for WCH PFIC.
1 # ARM Generic Interrupt Controller (GIC) configuration15 The ARM Generic Interrupt Controller v1 (e.g. PL390) works with the22 The ARM Generic Interrupt Controller v2 (e.g. GIC-400) works with the29 The ARM Generic Interrupt Controller v3 (e.g. GIC-500 and GIC-600)55 bool "GIC v3 Interrupt Translation Service"61 Support for the optional Interrupt Translation Service used to translate
9 bool "TI Vectored Interrupt Manager"13 The TI Vectored Interrupt Manager provides hardware assistance for prioritizing
5 bool "Enhanced Core Local Interrupt Controller (ECLIC)"11 Interrupt controller for Nuclei SoC core.19 Interrupt controller for Nordic VPR cores.
7 bool "CAVS Interrupt Logic"21 the ISRs for CAVS Interrupt Controller are assigned.43 Cavs Interrupt Logic initialization priority.
9 bool "External Interrupt/Event Controller (EXTI) Driver for STM32 family of MCUs"16 bool "GPIO Interrupt Controller Driver for STM32WB0 series"
1 # Espressif's Interrupt Allocator driver for Xtensa SoCs7 bool "Interrupt allocator for Xtensa-based Espressif SoCs"
1 # MCUXpresso SDK Periodic Interrupt Timer (PIT)12 Enable support for the NXP Periodic Interrupt Timer (PIT).
4 # Renesas RA External Interrupt Option7 bool "Renesas RA External Interrupt Driver"
14 bool "Penwell SPI Interrupt mode Support"16 Enable Interrupt support for the SPI Driver.
16 bool "NXP S32 SPI Interrupt Support"19 Enable Interrupt support for SPI communication.
15 bool "NPCX SPIP Interrupt Support"18 Enable Interrupt support for the SPI Driver of NPCX chip.
18 bool "RA MCU SPI Interrupt Support"20 Enable Interrupt support for the SPI Driver of RA family.
18 bool "RA MCU SPI B Interrupt Support"20 Enable Interrupt support for the SPI B Driver of RA family.
18 bool "STM32 MCU SPI Interrupt Support"20 Enable Interrupt support for the SPI Driver of STM32 family.
26 int "Port 0 RX Interrupt Threshold Count"33 int "Port 0 TX Interrupt Threshold Count"49 int "Port 0 RX Interrupt Threshold Count"56 int "Port 1 TX Interrupt Threshold Count"
25 # 0x0 Boot Loader Mode. Interrupt vectors are re-mapped to27 # 0x1 User RAM Mode. Interrupt vectors are re-mapped to29 # 0x2 User Flash Mode. Interrupt vectors are not re-mapped
28 # 0x0 Boot Loader Mode. Interrupt vectors are re-mapped to30 # 0x1 User RAM Mode. Interrupt vectors are re-mapped to32 # 0x2 User Flash Mode. Interrupt vectors are not re-mapped
8 # - Interrupt Collections table: 1x4K aligned on 4K14 # This doesn't necessarily include the Interrupt Translation Table, which are
30 bool "USB HID Device Interrupt OUT Endpoint"32 Enable USB HID Device Interrupt OUT Endpoint.35 int "USB HID Device Interrupt Endpoint size"
20 bool "Cadence Nand Interrupt Support"23 Enable Cadence Nand Interrupt Support.
46 bool "Intel ADSP HDA Host L1 Exit Interrupt"50 Intel ADSP HDA Host Interrupt for L1 exit.
22 With the Interrupt-driven API, possibly slow communication can happen in the33 Interrupt-driven API and the Asynchronous API should NOT be used at75 Interrupt-driven API
