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Searched refs:IndexCmu (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Monitor.c416 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu) in Clock_Ip_CMU_GetInterruptStatus() argument
421 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_GetInterruptStatus()
439 uint32 IndexCmu; in Clock_Ip_CMU_ClockFailInt() local
441 for (IndexCmu = 0U; IndexCmu < CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE; IndexCmu++) in Clock_Ip_CMU_ClockFailInt()
444 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
450 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
458 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
460 CLOCK_IP_CMU_FCCU_NOTIFICATION(Clock_Ip_aeCmuNames[IndexCmu]); in Clock_Ip_CMU_ClockFailInt()
462 Clock_Ip_ReportClockErrors(CLOCK_IP_CMU_ERROR, Clock_Ip_aeCmuNames[IndexCmu]); in Clock_Ip_CMU_ClockFailInt()
469 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
/hal_nxp-3.6.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Monitor.c449 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu) in Clock_Ip_CMU_GetInterruptStatus() argument
454 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_GetInterruptStatus()
472 uint32 IndexCmu; in Clock_Ip_CMU_ClockFailInt() local
474 for (IndexCmu = 0U; IndexCmu < CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE; IndexCmu++) in Clock_Ip_CMU_ClockFailInt()
477 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
483 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
491 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
493 CLOCK_IP_CMU_FCCU_NOTIFICATION(Clock_Ip_aeCmuNames[IndexCmu]); in Clock_Ip_CMU_ClockFailInt()
495 Clock_Ip_ReportClockErrors(CLOCK_IP_CMU_ERROR, Clock_Ip_aeCmuNames[IndexCmu]); in Clock_Ip_CMU_ClockFailInt()
502 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Monitor.c436 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu) in Clock_Ip_CMU_GetInterruptStatus() argument
441 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_GetInterruptStatus()
459 uint32 IndexCmu; in Clock_Ip_CMU_ClockFailInt() local
461 for (IndexCmu = 0U; IndexCmu < CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE; IndexCmu++) in Clock_Ip_CMU_ClockFailInt()
464 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
470 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
478 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
480 CLOCK_IP_CMU_FCCU_NOTIFICATION(Clock_Ip_aeCmuNames[IndexCmu]); in Clock_Ip_CMU_ClockFailInt()
482 Clock_Ip_ReportClockErrors(CLOCK_IP_CMU_ERROR, Clock_Ip_aeCmuNames[IndexCmu]); in Clock_Ip_CMU_ClockFailInt()
489 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
/hal_nxp-3.6.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Private.h520 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu);
/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Private.h520 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu);
/hal_nxp-3.6.0/s32/drivers/s32k1/Mcu/include/
DClock_Ip_Private.h520 uint32 Clock_Ip_CMU_GetInterruptStatus(uint8 IndexCmu);