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Searched refs:IP_GPR3_PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c2323 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->PIT0PCTL & GPR3_PCTL_PIT0PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_CE_PIT0_CLK_Frequency()
2333 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->PIT1PCTL & GPR3_PCTL_PIT1PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_CE_PIT1_CLK_Frequency()
2343 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->PIT2PCTL & GPR3_PCTL_PIT2PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_CE_PIT2_CLK_Frequency()
2353 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->PIT3PCTL & GPR3_PCTL_PIT3PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_CE_PIT3_CLK_Frequency()
2363 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->PIT4PCTL & GPR3_PCTL_PIT4PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_CE_PIT4_CLK_Frequency()
2373 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->PIT5PCTL & GPR3_PCTL_PIT5PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_CE_PIT5_CLK_Frequency()
2559 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->EDMACEPCTL & GPR3_PCTL_EDMACEPCTL_PCTL_MASK) >… in Clock_Ip_Get_CE_EDMA_CLK_Frequency()
2586 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->EDMA3PCTL & GPR3_PCTL_EDMA3PCTL_PCTL_MASK) >> … in Clock_Ip_Get_EDMA3_CLK_Frequency()
2644 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->CAN0PCTL & GPR3_PCTL_CAN0PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_FLEXCAN0_CLK_Frequency()
2654 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->CAN1PCTL & GPR3_PCTL_CAN1PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_FLEXCAN1_CLK_Frequency()
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/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR3_PCTL.h116 #define IP_GPR3_PCTL ((GPR3_PCTL_Type *)IP_GPR3_PCTL_BASE) macro
120 #define IP_GPR3_PCTL_BASE_PTRS { IP_GPR3_PCTL }