GPR5_PCTL_EDMA5PCTL_PCTL_0_MASK (reference) in projects: hal_nxp-3.6.0

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Searched refs:GPR5_PCTL_EDMA5PCTL_PCTL_0_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
D	S32Z2_GPR5_PCTL.h	`107 #define GPR5_PCTL_EDMA5PCTL_PCTL_0_MASK (0x1U) macro 110 …(uint32_t)(((uint32_t)(x)) << GPR5_PCTL_EDMA5PCTL_PCTL_0_SHIFT)) & GPR5_PCTL_EDMA5PCTL_PCTL_0_MASK)`
/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
D	Clock_Ip_Frequency.c	`2605 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->EDMA5PCTL & GPR5_PCTL_EDMA5PCTL_PCTL_0_MASK) >… in Clock_Ip_Get_EDMA5_CLK_Frequency()`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
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babblesim_ext_2G4_phy_v1-3.4.0
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