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Searched refs:DMA0_TRIG5_PIO1_13 (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-3.6.0/dts/nxp/lpc/
DLPC51U68JBD64-pinctrl.h1354 #define DMA0_TRIG5_PIO1_13 IOCON_MUX(45, IOCON_TYPE_D, 0) /* PIO1_13 */ macro
DLPC54114J256BD64-pinctrl.h1540 #define DMA0_TRIG5_PIO1_13 IOCON_MUX(45, IOCON_TYPE_D, 0) /* PIO1_13 */ macro
/hal_nxp-3.6.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h3314 #define DMA0_TRIG5_PIO1_13 IOPCTL_MUX(45, 0) /* PIO1_13 */ macro
DMIMXRT595SFAWC-pinctrl.h3867 #define DMA0_TRIG5_PIO1_13 IOPCTL_MUX(45, 0) /* PIO1_13 */ macro
DMIMXRT685SFVKB-pinctrl.h4055 #define DMA0_TRIG5_PIO1_13 IOPCTL_MUX(45, 0) /* PIO1_13 */ macro
DMIMXRT595SFFOC-pinctrl.h3889 #define DMA0_TRIG5_PIO1_13 IOPCTL_MUX(45, 0) /* PIO1_13 */ macro
DMIMXRT685SFFOB-pinctrl.h4055 #define DMA0_TRIG5_PIO1_13 IOPCTL_MUX(45, 0) /* PIO1_13 */ macro