Home
last modified time | relevance | path

Searched refs:DMA0_TRIG15_PIO0_1 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.6.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h60 #define DMA0_TRIG15_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */ macro
DLPC54114J256UK49-pinctrl.h65 #define DMA0_TRIG15_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */ macro
DLPC51U68JBD64-pinctrl.h60 #define DMA0_TRIG15_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */ macro
DLPC54114J256BD64-pinctrl.h65 #define DMA0_TRIG15_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */ macro
/hal_nxp-3.6.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h103 #define DMA0_TRIG15_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro
DMIMXRT595SFAWC-pinctrl.h119 #define DMA0_TRIG15_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro
DMIMXRT685SFVKB-pinctrl.h105 #define DMA0_TRIG15_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro
DMIMXRT595SFFOC-pinctrl.h121 #define DMA0_TRIG15_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro
DMIMXRT685SFFOB-pinctrl.h105 #define DMA0_TRIG15_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro