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Searched refs:DMA0_TRIG0_PIO1_4 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.6.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h1000 #define DMA0_TRIG0_PIO1_4 IOCON_MUX(36, IOCON_TYPE_D, 0) /* PIO1_4 */ macro
DLPC54114J256UK49-pinctrl.h1139 #define DMA0_TRIG0_PIO1_4 IOCON_MUX(36, IOCON_TYPE_D, 0) /* PIO1_4 */ macro
DLPC51U68JBD64-pinctrl.h1059 #define DMA0_TRIG0_PIO1_4 IOCON_MUX(36, IOCON_TYPE_D, 0) /* PIO1_4 */ macro
DLPC54114J256BD64-pinctrl.h1207 #define DMA0_TRIG0_PIO1_4 IOCON_MUX(36, IOCON_TYPE_D, 0) /* PIO1_4 */ macro
/hal_nxp-3.6.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2680 #define DMA0_TRIG0_PIO1_4 IOPCTL_MUX(36, 0) /* PIO1_4 */ macro
DMIMXRT595SFAWC-pinctrl.h3160 #define DMA0_TRIG0_PIO1_4 IOPCTL_MUX(36, 0) /* PIO1_4 */ macro
DMIMXRT685SFVKB-pinctrl.h3231 #define DMA0_TRIG0_PIO1_4 IOPCTL_MUX(36, 0) /* PIO1_4 */ macro
DMIMXRT595SFFOC-pinctrl.h3162 #define DMA0_TRIG0_PIO1_4 IOPCTL_MUX(36, 0) /* PIO1_4 */ macro
DMIMXRT685SFFOB-pinctrl.h3231 #define DMA0_TRIG0_PIO1_4 IOPCTL_MUX(36, 0) /* PIO1_4 */ macro