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Searched refs:CTR (Results 1 – 25 of 52) sorted by relevance

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/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/otfad/
Dfsl_otfad.c181 base->CTX[contextIndex].CTR[0] = tempCounter[0]; in OTFAD_SetEncryptionConfig()
182 base->CTX[contextIndex].CTR[1] = tempCounter[1]; in OTFAD_SetEncryptionConfig()
210 config->counter[0] = base->CTX[config->contextIndex].CTR[0]; in OTFAD_GetEncryptionConfig()
211 config->counter[1] = base->CTX[config->contextIndex].CTR[1]; in OTFAD_GetEncryptionConfig()
/hal_nxp-3.6.0/mcux/mcux-sdk/components/css_pkc/
DReleaseNotes.txt30 - AES-128/192/256 encryption/decryption, modes ECB/CBC/CTR/GCM/CMAC
/hal_nxp-3.6.0/s32/drivers/s32k3/Adc/include/
DAdc_Sar_Ip_HeaderWrapper_S32K3.h173 #define CTR(base, regIndex) REG_ACCESS((base)->CTR0, (regIndex)) macro
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SCB.h107 __I uint32_t CTR; /**< Cache Type Register, offset: 0xD7C */ member
/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_SCB.h106 __I uint32_t CTR; /**< Cache Type Register, offset: 0xD7C */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm7.h483 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
Dcore_cm33.h526 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/Include/
Dcore_armv8mml.h519 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
Dcore_cm33.h519 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
Dcore_cm35p.h519 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
Dcore_cm7.h478 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
Dcore_armv81mml.h520 __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ member
/hal_nxp-3.6.0/s32/drivers/s32k3/Adc/src/
DAdc_Sar_Ip.c3929 CTR(AdcAEBasePtr, Index) = ADC_CTR_INPSAMP(aSampleTimes[Index]); in Adc_Sar_Ip_SetSampleTimes()
3939 CTR(AdcBasePtr, Index) = ADC_CTR_INPSAMP(aSampleTimes[Index]); in Adc_Sar_Ip_SetSampleTimes()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h17147 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
DMIMXRT685S_cm33.h24204 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h20503 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0x110, array… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h20504 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0x110, array… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h22187 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h24204 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h27869 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
DMIMXRT595S_cm33.h35049 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h33422 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h35048 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h60385 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member
DMIMXRT1165_cm4.h61318 …__IO uint32_t CTR[2]; /**< AES Counter Word, array offset: 0xD10, array… member

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