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Searched refs:CHMUX_AVL_SHIFT (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_inputmux_connections.h49 #define CHMUX_AVL_SHIFT 31U macro
605 …mic0Ch0ToDmac0Ch16RequestEna = 16U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
607 …lexcomm8RxToDmac0Ch16RequestEna = 16U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
609 …X_Dmic0Ch1ToDmac0Ch17RequestEna = 17U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
611 …lexcomm8TxToDmac0Ch17RequestEna = 17U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
614 …X_Dmic0Ch2ToDmac0Ch18RequestEna = 18U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
616 …lexcomm9RxToDmac0Ch18RequestEna = 18U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
619 …X_Dmic0Ch3ToDmac0Ch19RequestEna = 19U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
621 …lexcomm9TxToDmac0Ch19RequestEna = 19U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
624 …X_Dmic0Ch4ToDmac0Ch20RequestEna = 20U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_inputmux_connections.h49 #define CHMUX_AVL_SHIFT 31U macro
605 …mic0Ch0ToDmac0Ch16RequestEna = 16U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
607 …lexcomm8RxToDmac0Ch16RequestEna = 16U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
609 …X_Dmic0Ch1ToDmac0Ch17RequestEna = 17U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
611 …lexcomm8TxToDmac0Ch17RequestEna = 17U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
614 …X_Dmic0Ch2ToDmac0Ch18RequestEna = 18U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
616 …lexcomm9RxToDmac0Ch18RequestEna = 18U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
619 …X_Dmic0Ch3ToDmac0Ch19RequestEna = 19U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
621 …lexcomm9TxToDmac0Ch19RequestEna = 19U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
624 …X_Dmic0Ch4ToDmac0Ch20RequestEna = 20U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_inputmux_connections.h49 #define CHMUX_AVL_SHIFT 31U macro
605 …mic0Ch0ToDmac0Ch16RequestEna = 16U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
607 …lexcomm8RxToDmac0Ch16RequestEna = 16U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
609 …X_Dmic0Ch1ToDmac0Ch17RequestEna = 17U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
611 …lexcomm8TxToDmac0Ch17RequestEna = 17U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
614 …X_Dmic0Ch2ToDmac0Ch18RequestEna = 18U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
616 …lexcomm9RxToDmac0Ch18RequestEna = 18U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
619 …X_Dmic0Ch3ToDmac0Ch19RequestEna = 19U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
621 …lexcomm9TxToDmac0Ch19RequestEna = 19U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
624 …X_Dmic0Ch4ToDmac0Ch20RequestEna = 20U + (DMA0_REQ_ENA0_ID << ENA_SHIFT) + (1U << CHMUX_AVL_SHIFT) +
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/inputmux/
Dfsl_inputmux.c94 if (enable && ((((uint32_t)signal) & (1UL << CHMUX_AVL_SHIFT)) != 0U)) in INPUTMUX_EnableSignal()
96 …chmux_offset = (((uint32_t)signal) >> CHMUX_OFF_SHIFT) & ((1UL << (CHMUX_AVL_SHIFT - CHMUX_OFF_SHI… in INPUTMUX_EnableSignal()