| /hal_nxp-3.6.0/imx/drivers/ |
| D | ccm_imx6sx.h | 597 …ccmCcgrGatePcieRoot = CCM_TUPLE(CCGR4, CCM_CCGR4_CG0_SHIFT, CCM_CCGR4_CG0_MASK), /*!< …
598 …ccmCcgrGateQspi2Clk = CCM_TUPLE(CCGR4, CCM_CCGR4_CG5_SHIFT, CCM_CCGR4_CG5_MASK), /*!< …
599 …ccmCcgrGatePl301Mx6qper1Bch = CCM_TUPLE(CCGR4, CCM_CCGR4_CG6_SHIFT, CCM_CCGR4_CG6_MASK), /*!< …
600 …ccmCcgrGatePl301Mx6qper2Main = CCM_TUPLE(CCGR4, CCM_CCGR4_CG7_SHIFT, CCM_CCGR4_CG7_MASK), /*!< …
601 …ccmCcgrGatePwm1Clk = CCM_TUPLE(CCGR4, CCM_CCGR4_CG8_SHIFT, CCM_CCGR4_CG8_MASK), /*!< …
602 …ccmCcgrGatePwm2Clk = CCM_TUPLE(CCGR4, CCM_CCGR4_CG9_SHIFT, CCM_CCGR4_CG9_MASK), /*!< …
603 …ccmCcgrGatePwm3Clk = CCM_TUPLE(CCGR4, CCM_CCGR4_CG10_SHIFT, CCM_CCGR4_CG10_MASK), /*!< …
604 …ccmCcgrGatePwm4Clk = CCM_TUPLE(CCGR4, CCM_CCGR4_CG11_SHIFT, CCM_CCGR4_CG11_MASK), /*!< …
605 …ccmCcgrGateRawnandUBchInptApb = CCM_TUPLE(CCGR4, CCM_CCGR4_CG12_SHIFT, CCM_CCGR4_CG12_MASK), /*!< …
606 …ccmCcgrGateRawnandUGpmiBch = CCM_TUPLE(CCGR4, CCM_CCGR4_CG13_SHIFT, CCM_CCGR4_CG13_MASK), /*!< …
[all …]
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| /hal_nxp-3.6.0/mcux/mcux-sdk/middleware/issdk/boardkit/evk-mimxrt1050/ |
| D | clock_config.c | 42 CCM->CCGR4 = 0x0000FF3CU; in BOARD_BootClockGate()
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/middleware/issdk/boardkit/evkb-imxrt1050/ |
| D | clock_config.c | 42 CCM->CCGR4 = 0x0000FF3CU; in BOARD_BootClockGate()
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| /hal_nxp-3.6.0/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 4508 …__IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0… member
4552 #define CCM_CCGR4_REG(base) ((base)->CCGR4)
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 3152 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 3732 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 4827 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 4843 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 5094 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
| D | MIMXRT1041.h | 6459 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
| D | MIMXRT1042.h | 6461 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
|
| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 5097 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 6537 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 6541 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 6615 __IO uint32_t CCGR4; /**< CCM Clock Gating Register 4, offset: 0x78 */ member
|
