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Searched refs:CCGR2 (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-3.6.0/imx/drivers/
Dccm_imx6sx.h573 …ccmCcgrGateCsiClk = CCM_TUPLE(CCGR2, CCM_CCGR2_CG1_SHIFT, CCM_CCGR2_CG1_MASK), /*!< …
574 …ccmCcgrGateI2c1Serialclk = CCM_TUPLE(CCGR2, CCM_CCGR2_CG3_SHIFT, CCM_CCGR2_CG3_MASK), /*!< …
575 …ccmCcgrGateI2c2Serialclk = CCM_TUPLE(CCGR2, CCM_CCGR2_CG4_SHIFT, CCM_CCGR2_CG4_MASK), /*!< …
576 …ccmCcgrGateI2c3Serialclk = CCM_TUPLE(CCGR2, CCM_CCGR2_CG5_SHIFT, CCM_CCGR2_CG5_MASK), /*!< …
577 …ccmCcgrGateIimClk = CCM_TUPLE(CCGR2, CCM_CCGR2_CG6_SHIFT, CCM_CCGR2_CG6_MASK), /*!< …
578 …ccmCcgrGateIomuxIptClkIo = CCM_TUPLE(CCGR2, CCM_CCGR2_CG7_SHIFT, CCM_CCGR2_CG7_MASK), /*!< …
579 …ccmCcgrGateIpmux1Clk = CCM_TUPLE(CCGR2, CCM_CCGR2_CG8_SHIFT, CCM_CCGR2_CG8_MASK), /*!< …
580 …ccmCcgrGateIpmux2Clk = CCM_TUPLE(CCGR2, CCM_CCGR2_CG9_SHIFT, CCM_CCGR2_CG9_MASK), /*!< …
581 …ccmCcgrGateIpmux3Clk = CCM_TUPLE(CCGR2, CCM_CCGR2_CG10_SHIFT, CCM_CCGR2_CG10_MASK), /*!< …
582 …ccmCcgrGateIpsyncIp2apbtTasc1 = CCM_TUPLE(CCGR2, CCM_CCGR2_CG11_SHIFT, CCM_CCGR2_CG11_MASK), /*!< …
[all …]
/hal_nxp-3.6.0/mcux/mcux-sdk/middleware/issdk/boardkit/evk-mimxrt1050/
Dclock_config.c40 CCM->CCGR2 = 0xFF3F003FU; in BOARD_BootClockGate()
/hal_nxp-3.6.0/mcux/mcux-sdk/middleware/issdk/boardkit/evkb-imxrt1050/
Dclock_config.c40 CCM->CCGR2 = 0xFF3F003FU; in BOARD_BootClockGate()
/hal_nxp-3.6.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h4506 …__IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0… member
4550 #define CCM_CCGR2_REG(base) ((base)->CCGR2)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h3150 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h3730 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h4825 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h4841 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h5092 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h6457 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h6459 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h5095 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h6535 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h6539 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h6613 __IO uint32_t CCGR2; /**< CCM Clock Gating Register 2, offset: 0x70 */ member