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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
36 .mainDiv = 361U,
45 .mainDiv = 400U,
53 .mainDiv = 250U,
61 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimx8mp/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
36 .mainDiv = 361U,
45 .mainDiv = 400U,
53 .mainDiv = 250U,
61 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimx8mp/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
36 .mainDiv = 361U,
45 .mainDiv = 400U,
53 .mainDiv = 250U,
61 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
36 .mainDiv = 361U,
45 .mainDiv = 400U,
53 .mainDiv = 250U,
61 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML4/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
36 .mainDiv = 361U,
45 .mainDiv = 400U,
53 .mainDiv = 250U,
61 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML3/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
36 .mainDiv = 361U,
45 .mainDiv = 400U,
53 .mainDiv = 250U,
61 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM3/project_template/
Dclock_config.c18 .mainDiv = 655U,
27 .mainDiv = 301U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 250,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM5/project_template/
Dclock_config.c18 .mainDiv = 655U,
27 .mainDiv = 301U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 250,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimx8mm/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 250,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM1/project_template/
Dclock_config.c18 .mainDiv = 655U,
27 .mainDiv = 301U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 250,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimx8mm/project_template/
Dclock_config.c18 .mainDiv = 655U,
27 .mainDiv = 301U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 250,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM2/project_template/
Dclock_config.c18 .mainDiv = 655U,
27 .mainDiv = 301U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 250,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM4/project_template/
Dclock_config.c18 .mainDiv = 655U,
27 .mainDiv = 301U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 250,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM6/project_template/
Dclock_config.c18 .mainDiv = 655U,
27 .mainDiv = 301U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 250,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimx8mn/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimx8mn/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimx8mnddr3l/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/project_template/
Dclock_config.c18 .mainDiv = 262U,
27 .mainDiv = 361U,
37 .mainDiv = 400U,
45 .mainDiv = 250U,
53 .mainDiv = 300,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/
Dsystem_MIMX8ML6_cm7.c84 … uint32_t mainDiv = CCM_BIT_FIELD_VAL(fracCfg1, CCM_ANALOG_AUDIO_PLL1_FDIV_CTL0_PLL_MAIN_DIV_MASK, in GetFracPllFreq() local
102 fracClk = (uint64_t)refClkFreq * ((uint64_t)mainDiv * 65536UL + (uint64_t)dsm) / in GetFracPllFreq()
119 …uint32_t mainDiv = CCM_BIT_FIELD_VAL(integerCfg1, CCM_ANALOG_SYS_PLL1_FDIV_CTL0_PLL_MAIN_DIV_MASK, in GetIntegerPllFreq() local
143 pllOutClock = (uint64_t)refClkFreq * mainDiv / (((uint64_t)(1U) << postDiv) * preDiv); in GetIntegerPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/
Dsystem_MIMX8ML8_cm7.c84 … uint32_t mainDiv = CCM_BIT_FIELD_VAL(fracCfg1, CCM_ANALOG_AUDIO_PLL1_FDIV_CTL0_PLL_MAIN_DIV_MASK, in GetFracPllFreq() local
102 fracClk = (uint64_t)refClkFreq * ((uint64_t)mainDiv * 65536UL + (uint64_t)dsm) / in GetFracPllFreq()
119 …uint32_t mainDiv = CCM_BIT_FIELD_VAL(integerCfg1, CCM_ANALOG_SYS_PLL1_FDIV_CTL0_PLL_MAIN_DIV_MASK, in GetIntegerPllFreq() local
143 pllOutClock = (uint64_t)refClkFreq * mainDiv / (((uint64_t)(1U) << postDiv) * preDiv); in GetIntegerPllFreq()

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