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Searched refs:kSPI0_RST_N_SHIFT_RSTn (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC802/drivers/
Dfsl_reset.h45 kSPI0_RST_N_SHIFT_RSTn = 0 | 11U, /**< SPI0 reset control. */ enumerator
85 kSPI0_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC811/drivers/
Dfsl_reset.h39 kSPI0_RST_N_SHIFT_RSTn = 0 | 0U, /**< SPI0 reset control. */ enumerator
92 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC810/drivers/
Dfsl_reset.h39 kSPI0_RST_N_SHIFT_RSTn = 0 | 0U, /**< SPI0 reset control. */ enumerator
92 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC812/drivers/
Dfsl_reset.h39 kSPI0_RST_N_SHIFT_RSTn = 0 | 0U, /**< SPI0 reset control. */ enumerator
92 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC834/drivers/
Dfsl_reset.h39 kSPI0_RST_N_SHIFT_RSTn = 0 | 0U, /**< SPI0 reset control. */ enumerator
92 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC822/drivers/
Dfsl_reset.h39 kSPI0_RST_N_SHIFT_RSTn = 0 | 0U, /**< SPI0 reset control. */ enumerator
92 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC824/drivers/
Dfsl_reset.h39 kSPI0_RST_N_SHIFT_RSTn = 0 | 0U, /**< SPI0 reset control. */ enumerator
92 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC832/drivers/
Dfsl_reset.h39 kSPI0_RST_N_SHIFT_RSTn = 0 | 0U, /**< SPI0 reset control. */ enumerator
92 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC804/drivers/
Dfsl_reset.h45 kSPI0_RST_N_SHIFT_RSTn = 0 | 11U, /**< SPI0 reset control. */ enumerator
89 kSPI0_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC844/drivers/
Dfsl_reset.h46 kSPI0_RST_N_SHIFT_RSTn = 0 | 11U, /**< SPI0 reset control. */ enumerator
104 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC845/drivers/
Dfsl_reset.h46 kSPI0_RST_N_SHIFT_RSTn = 0 | 11U, /**< SPI0 reset control. */ enumerator
104 kSPI0_RST_N_SHIFT_RSTn, kSPI1_RST_N_SHIFT_RSTn \