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Searched refs:kLPSPI_SlavePcs0 (Results 1 – 25 of 30) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX3/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX3/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX4/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX6/template/
DRTE_Device.h160 #define RTE_SPI0_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
174 #define RTE_SPI1_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
188 #define RTE_SPI2_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
202 #define RTE_SPI3_SLAVE_PCS_PIN_SEL kLPSPI_SlavePcs0
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/template/
DRTE_Device.h146 #define RTE_SPI0_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
162 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
178 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
194 #define RTE_SPI3_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/template/
DRTE_Device.h146 #define RTE_SPI0_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
162 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
178 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
194 #define RTE_SPI3_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/template/
DRTE_Device.h146 #define RTE_SPI0_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
162 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
178 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
194 #define RTE_SPI3_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/template/
DRTE_Device.h144 #define RTE_SPI0_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
160 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
176 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
192 #define RTE_SPI3_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/template/
DRTE_Device.h144 #define RTE_SPI0_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
160 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
176 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
192 #define RTE_SPI3_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/evk-mimxrt1050/
DRTE_Device.h91 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
105 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
119 #define RTE_SPI3_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
133 #define RTE_SPI4_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/evkb-imxrt1050/
DRTE_Device.h91 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
105 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
119 #define RTE_SPI3_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
133 #define RTE_SPI4_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/template/
DRTE_Device.h198 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
214 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
230 #define RTE_SPI3_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
246 #define RTE_SPI4_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/template/
DRTE_Device.h122 #define RTE_SPI0_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
138 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
154 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/template/
DRTE_Device.h122 #define RTE_SPI0_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
138 #define RTE_SPI1_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
154 #define RTE_SPI2_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/kw45b41z-evk/
DRTE_Device.h53 #define RTE_SPI0_SLAVE_PCS_PIN_SEL (kLPSPI_SlavePcs0)

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