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Searched refs:TPM_TRIG_TRIG0_MASK (Results 1 – 25 of 26) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/tpm/
Dfsl_tpm.h667 base->TRIG |= (uint32_t)TPM_TRIG_TRIG0_MASK << (uint8_t)chnlNumber; in TPM_EnableChannelExtTrigger()
671 base->TRIG &= ~((uint32_t)TPM_TRIG_TRIG0_MASK << (uint8_t)chnlNumber); in TPM_EnableChannelExtTrigger()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h15708 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
15714 …ine TPM_TRIG_TRIG0(x) (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h15708 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
15714 …ine TPM_TRIG_TRIG0(x) (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h18333 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
18339 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
DK32L3A60_cm4.h18283 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
18289 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h31159 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
31165 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h31158 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
31164 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h74531 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
74537 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
DMIMX8QM6_cm4_core0.h87152 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
87158 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
DMIMX8QM6_cm4_core1.h87151 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
87157 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h98292 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
98298 …ine TPM_TRIG_TRIG0(x) (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
DMIMX9352_ca55.h85946 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
85952 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h94919 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
94925 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h94919 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
94925 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h94920 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
94926 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h94920 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
94926 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h125380 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125386 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h125382 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125388 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h125382 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125388 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_cm4.h125382 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125388 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h125382 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125388 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h125381 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125387 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h125381 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125387 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h125379 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125385 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h125379 #define TPM_TRIG_TRIG0_MASK (0x1U) macro
125385 … (((uint32_t)(((uint32_t)(x)) << TPM_TRIG_TRIG0_SHIFT)) & TPM_TRIG_TRIG0_MASK)

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