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Searched refs:SIUL2_MSCR_SRE_MASK (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-3.5.0/s32/soc/s32z27/include/
DSiul2_Port_Ip_Defines.h100 #ifdef SIUL2_MSCR_SRE_MASK
101 #undef SIUL2_MSCR_SRE_MASK
105 #define SIUL2_MSCR_SRE_MASK (0x1C000U) macro
108 … (((uint32_t)(((uint32_t)(x)) << SIUL2_MSCR_SRE_SHIFT)) & SIUL2_MSCR_SRE_MASK)
/hal_nxp-3.5.0/s32/soc/s32k344/include/
DSiul2_Port_Ip_Cfg.h75 #define SIUL2_MSCR_SRE_MASK (0x4000U) macro
78 …x) (((uint32)(((uint32)(x)) << SIUL2_MSCR_SRE_SHIFT)) & SIUL2_MSCR_SRE_MASK)
/hal_nxp-3.5.0/s32/drivers/s32k3/Port/src/
DSiul2_Port_Ip.c525 u32TempVal = (u32RegVal & SIUL2_MSCR_SRE_MASK) >> SIUL2_MSCR_SRE_SHIFT; in Siul2_Port_Ip_GetMSCRConfiguration()
/hal_nxp-3.5.0/s32/drivers/s32ze/Port/src/
DSiul2_Port_Ip.c743 u32TempVal = (u32RegVal & SIUL2_MSCR_SRE_MASK) >> SIUL2_MSCR_SRE_SHIFT; in Siul2_Port_Ip_GetMSCRConfiguration()
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SIUL2.h1366 #define SIUL2_MSCR_SRE_MASK (0x1C000U) macro
1369 … (((uint32_t)(((uint32_t)(x)) << SIUL2_MSCR_SRE_SHIFT)) & SIUL2_MSCR_SRE_MASK)