SIUL2_0_MSCR_BASE (reference) in projects: hal_nxp-3.5.0

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Searched refs:SIUL2_0_MSCR_BASE (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.5.0/s32/soc/s32z27/include/
D	Siul2_Port_Ip_Defines.h	`146 #define SIUL2_0_MSCR_BASE (IP_SIUL2_0->MSCR) macro 154 #define PORTA ((Siul2_Port_Ip_PortType )(SIUL2_0_MSCR_BASE + 0x00)) 156 #define PORTB ((Siul2_Port_Ip_PortType )(SIUL2_0_MSCR_BASE + 0x10)) 186 #define PORTO ((Siul2_Port_Ip_PortType *)(SIUL2_0_MSCR_BASE + 0xA0))`
/hal_nxp-3.5.0/s32/drivers/s32k3/Port/src/
D	Siul2_Port_Ip.c	`879 … portNumber = (uint32)((uint32)((uint32)((uint32)base - (uint32)SIUL2_0_MSCR_BASE) >> 2U) >> 4U); in Siul2_Port_Ip_RevertPinConfiguration() 934 u32MscrBase = (uint32)SIUL2_0_MSCR_BASE; in Siul2_Port_Ip_GetPinConfiguration()`
/hal_nxp-3.5.0/s32/drivers/s32ze/Port/src/
D	Siul2_Port_Ip.c	`1204 …Ip_CoreType)((Siul2_Port_Ip_CoreType)base - (Siul2_Port_Ip_CoreType)SIUL2_0_MSCR_BASE) >> 2U) >> 4… in Siul2_Port_Ip_RevertPinConfiguration() 1287 u32MscrBase = (Siul2_Port_Ip_CoreType)SIUL2_0_MSCR_BASE; in Siul2_Port_Ip_GetPinConfiguration()`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
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babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
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