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Searched refs:RTU_MC_CGM_PCFS_DIVC10_RATE_MASK (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_RTU_MC_CGM.h135 #define RTU_MC_CGM_PCFS_DIVC10_RATE_MASK (0xFFU) macro
138 …int32_t)(((uint32_t)(x)) << RTU_MC_CGM_PCFS_DIVC10_RATE_SHIFT)) & RTU_MC_CGM_PCFS_DIVC10_RATE_MASK)