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Searched refs:QSPI0PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR4_PCTL.h73 …__IO uint32_t QSPI0PCTL; /**< QuadSPI_0 Clock Control Enable, offset: 0x0 … member
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c3777 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR4_PCTL->QSPI0PCTL & GPR4_PCTL_QSPI0PCTL_PCTL_MASK) >> … in Clock_Ip_Get_QSPI0_CLK_Frequency()