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Searched refs:PSI51PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR4_PCTL.h85 __IO uint32_t PSI51PCTL; /**< PSI5_1 Clock Control Enable, offset: 0x30 */ member
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c3747 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR4_PCTL->PSI51PCTL & GPR4_PCTL_PSI51PCTL_PCTL_MASK) >> … in Clock_Ip_Get_PSI5_1_CLK_Frequency()