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Searched refs:PRTN1_COFB1_STAT (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Specific.c206 if (0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK56_MASK)) in Clock_Ip_PllPowerClockIp()
219 …while((0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK56_MASK)) && (FALSE == Time… in Clock_Ip_PllPowerClockIp()
230 if (0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK57_MASK)) in Clock_Ip_PllPowerClockIp()
243 …while((0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK57_MASK)) && (FALSE == Time… in Clock_Ip_PllPowerClockIp()
266 if (0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK53_MASK)) in Clock_Ip_PowerClockIpModules()
279 …while((0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK53_MASK)) && (FALSE == Time… in Clock_Ip_PowerClockIpModules()
290 if (0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK51_MASK)) in Clock_Ip_PowerClockIpModules()
303 …while((0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK51_MASK)) && (FALSE == Time… in Clock_Ip_PowerClockIpModules()
314 if (0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK47_MASK)) in Clock_Ip_PowerClockIpModules()
327 …while((0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK47_MASK)) && (FALSE == Time… in Clock_Ip_PowerClockIpModules()
DClock_Ip_Frequency.c1778 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK53_M… in Clock_Ip_Get_FXOSC_CLK_Frequency()
1790 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK51_M… in Clock_Ip_Get_SXOSC_CLK_Frequency()
2223 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK32_M… in Clock_Ip_Get_DMAMUX0_CLK_Frequency()
2229 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK33_M… in Clock_Ip_Get_DMAMUX1_CLK_Frequency()
2998 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK59_M… in Clock_Ip_Get_FLASH1_CLK_Frequency()
3006 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK60_M… in Clock_Ip_Get_FLASH1_ALT_CLK_Frequency()
3405 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK63_M… in Clock_Ip_Get_PIT2_CLK_Frequency()
3504 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK34_M… in Clock_Ip_Get_RTC0_CLK_Frequency()
3582 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK42_M… in Clock_Ip_Get_SIUL2_CLK_Frequency()
3589 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK36_M… in Clock_Ip_Get_SIUL2_PDAC0_0_CLK_Frequency()
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/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_ME.h100 …__I uint32_t PRTN1_COFB1_STAT; /**< Partition 1 COFB Set 1 Clock Status Register… member