Home
last modified time | relevance | path

Searched refs:PRTN1_COFB0_STAT (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Frequency.c2105 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK0_MA… in Clock_Ip_Get_AXBS_CLK_Frequency()
2113 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK1_MA… in Clock_Ip_Get_AXBS0_CLK_Frequency()
2121 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK2_MA… in Clock_Ip_Get_AXBS1_CLK_Frequency()
2263 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK3_MA… in Clock_Ip_Get_EDMA0_CLK_Frequency()
2269 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK4_MA… in Clock_Ip_Get_EDMA0_TCD0_CLK_Frequency()
2275 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK5_MA… in Clock_Ip_Get_EDMA0_TCD1_CLK_Frequency()
2281 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK6_MA… in Clock_Ip_Get_EDMA0_TCD2_CLK_Frequency()
2287 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK7_MA… in Clock_Ip_Get_EDMA0_TCD3_CLK_Frequency()
2293 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK8_MA… in Clock_Ip_Get_EDMA0_TCD4_CLK_Frequency()
2299 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK9_MA… in Clock_Ip_Get_EDMA0_TCD5_CLK_Frequency()
[all …]
DClock_Ip_Specific.c337 if (0U == (IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK24_MASK)) in Clock_Ip_PowerClockIpModules()
350 …while((0U == (IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK24_MASK)) && (FALSE == Time… in Clock_Ip_PowerClockIpModules()
DClock_Ip_Data.c3541 …le const Clock_Ip_McmePartitionGetType*)( ((volatile const uint8*)&(IP_MC_ME->PRTN1_COFB0_STAT)) ),
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_ME.h99 …__I uint32_t PRTN1_COFB0_STAT; /**< Partition 1 COFB Set 0 Clock Status Register… member