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Searched refs:PIT5PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR3_PCTL.h105 …__IO uint32_t PIT5PCTL; /**< CE_PIT_5 Clock Control Enable, offset: 0x80 … member
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c2371 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->PIT5PCTL & GPR3_PCTL_PIT5PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_CE_PIT5_CLK_Frequency()