Searched refs:MUX_0_DC_4 (Results 1 – 2 of 2) sorted by relevance
85 …__IO uint32_t MUX_0_DC_4; /**< Clock Mux 0 Divider 4 Control Register, offs… member
1970 …Frequency &= Clock_Ip_au32EnableDivider[((IP_MC_CGM->MUX_0_DC_4 & MC_CGM_MUX_0_DC_4_DE_MASK) >> MC… in Clock_Ip_Get_DCM_CLK_Frequency()1971 …Frequency /= (((IP_MC_CGM->MUX_0_DC_4 & MC_CGM_MUX_0_DC_4_DIV_MASK) >> MC_CGM_MUX_0_DC_4_DIV_SHIFT… in Clock_Ip_Get_DCM_CLK_Frequency()