/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/lpit/ |
D | fsl_lpit.h | 260 return base->MSR; in LPIT_GetStatusFlags() 273 base->MSR = mask; in LPIT_ClearStatusFlags()
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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/lpi2c/ |
D | fsl_lpi2c.h | 581 return base->MSR; in LPI2C_MasterGetStatusFlags() 606 base->MSR = statusMask; in LPI2C_MasterClearStatusFlags() 769 return ((base->MSR & LPI2C_MSR_BBF_MASK) >> LPI2C_MSR_BBF_SHIFT) == 1U ? true : false; in LPI2C_MasterGetBusIdleState()
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/hal_nxp-3.5.0/s32/drivers/s32k3/Adc/src/ |
D | Adc_Sar_Ip.c | 771 Msr = AdcAEBasePtr->MSR; in Adc_Sar_GetMsrFlags() 777 Msr = AdcBasePtr->MSR; in Adc_Sar_GetMsrFlags() 1121 MSRAddr = &(AdcAEBasePtr->MSR); in Adc_Sar_CheckSelfTestProgress() 1128 MSRAddr = &(AdcBasePtr->MSR); in Adc_Sar_CheckSelfTestProgress() 2558 Msr = AdcAEBasePtr->MSR; in Adc_Sar_Ip_SetResolution() 2567 Msr = AdcBasePtr->MSR; in Adc_Sar_Ip_SetResolution() 2771 MSRAddr = &(AdcAEBasePtr->MSR); in Adc_Sar_Ip_SelfTest() 2790 MSRAddr = &(AdcBasePtr->MSR); in Adc_Sar_Ip_SelfTest() 3302 … while (((AdcBasePtr->MSR & ADC_MSR_CALBUSY_MASK) != 0U) && (ElapsedTicks < TimeoutTicks)) in Adc_Sar_Ip_DoCalibration() 3311 else if ((AdcBasePtr->MSR & ADC_MSR_CALFAIL_MASK) != 0U) in Adc_Sar_Ip_DoCalibration() [all …]
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/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_JDC.h | 74 __IO uint32_t MSR; /**< Module Status Register, offset: 0x4 */ member
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D | S32K344_LPI2C.h | 77 __IO uint32_t MSR; /**< Master Status, offset: 0x14 */ member
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D | S32K344_BCTU.h | 80 __IO uint32_t MSR; /**< Module Status, offset: 0x8 */ member
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D | S32K344_ADC.h | 83 __I uint32_t MSR; /**< Main Status, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/ctimer/ |
D | fsl_ctimer.h | 672 base->MSR[match] = matchvalue; in CTIMER_SetShadowValue()
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/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_ADC.h | 78 __IO uint32_t MSR; /**< Main Status, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX9352/iar/ |
D | startup_MIMX9352_cm33.s | 363 MSR MSP, R2
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/ |
D | MKE14Z4.h | 3516 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 4553 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/ |
D | MKE15Z4.h | 3517 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 4554 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC802/ |
D | LPC802.h | 1183 …__IO uint32_t MSR[4]; /**< Match Shadow Register . If enabled, the Matc… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/ |
D | MKE12Z7.h | 6344 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 7506 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/ |
D | MKE16Z4.h | 3515 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 4552 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/ |
D | MKE13Z7.h | 6346 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 7508 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/ |
D | MKE17Z7.h | 6348 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 7510 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC804/ |
D | LPC804.h | 1565 …__IO uint32_t MSR[4]; /**< Match Shadow Register . If enabled, the Matc… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/ |
D | MKE14Z7.h | 6076 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 7117 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/ |
D | MKE15Z7.h | 6078 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 7119 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/ |
D | MKE14F16.h | 8524 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 9690 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/ |
D | MKE16F16.h | 9523 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 10689 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/ |
D | K32L2A31A.h | 7392 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 8460 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/ |
D | K32L2A41A.h | 7392 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 8460 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/ |
D | MKE18F16.h | 9528 __IO uint32_t MSR; /**< Master Status Register, offset: 0x14 */ member 10694 __IO uint32_t MSR; /**< Module Status Register, offset: 0xC */ member
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