Searched refs:MMAU__A10 (Results 1 – 1 of 1) sorted by relevance
42 #define MMAU__A10 0xF0004010UL /*!< Accumulator register pair A10 */ macro412 *((uint64_t volatile *)(MMAU__REGRW | MMAU__A10)) = dval; in MMAU_ulda_d()429 return *((uint64_t volatile *)(MMAU__UMUL | MMAU__A10)); in MMAU_d_umul_ll()447 return *((uint64_t volatile *)(MMAU__UMULD | MMAU__A10)); in MMAU_d_umul_dl()466 return *((uint64_t volatile *)(MMAU__UMULD | MMAU__A10 | MMAU__SAT)); in MMAU_d_umuls_dl()483 return *((uint64_t volatile *)(MMAU__UMULDA | MMAU__A10)); in MMAU_d_umula_l()502 return *((uint64_t volatile *)(MMAU__UMULDA | MMAU__A10 | MMAU__SAT)); in MMAU_d_umulas_l()522 return *((uint64_t volatile *)(MMAU__UMAC | MMAU__A10)); in MMAU_d_umac_ll()543 return *((uint64_t volatile *)(MMAU__UMAC | MMAU__A10 | MMAU__SAT)); in MMAU_d_umacs_ll()564 return *((uint64_t volatile *)(MMAU__UMACD | MMAU__A10)); in MMAU_d_umac_dl()[all …]
