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Searched refs:MC_ME_PRTN1_COFB0_STAT_BLOCK7_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_ME.h506 #define MC_ME_PRTN1_COFB0_STAT_BLOCK7_MASK (0x80U) macro
509 …2_t)(((uint32_t)(x)) << MC_ME_PRTN1_COFB0_STAT_BLOCK7_SHIFT)) & MC_ME_PRTN1_COFB0_STAT_BLOCK7_MASK)
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Frequency.c2287 …cy &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB0_STAT & MC_ME_PRTN1_COFB0_STAT_BLOCK7_MASK) >> … in Clock_Ip_Get_EDMA0_TCD3_CLK_Frequency()