Searched refs:IP_MC_CGM_2 (Results 1 – 3 of 3) sorted by relevance
1965 …Frequency = Clock_Ip_apfFreqTableClkSrc[((IP_MC_CGM_2->MUX_2_CSS & MC_CGM_MUX_2_CSS_SELSTAT_MASK)… in Clock_Ip_Get_P2_DBG_ATB_CLK_Frequency()1972 …Frequency = Clock_Ip_apfFreqTableClkSrc[((IP_MC_CGM_2->MUX_1_CSS & MC_CGM_MUX_1_CSS_SELSTAT_MASK)… in Clock_Ip_Get_P2_REG_INTF_CLK_Frequency()1973 …Frequency &= Clock_Ip_au32EnableDivider[((IP_MC_CGM_2->MUX_1_DC_0 & MC_CGM_MUX_1_DC_0_DE_MASK) >> … in Clock_Ip_Get_P2_REG_INTF_CLK_Frequency()1974 …Frequency /= (((IP_MC_CGM_2->MUX_1_DC_0 & MC_CGM_MUX_1_DC_0_DIV_MASK) >> MC_CGM_MUX_1_DC_0_DIV_SHI… in Clock_Ip_Get_P2_REG_INTF_CLK_Frequency()2058 …Frequency = Clock_Ip_apfFreqTableClkSrc[((IP_MC_CGM_2->MUX_0_CSS & MC_CGM_MUX_0_CSS_SELSTAT_MASK)… in Clock_Ip_Get_P2_SYS_CLK_Frequency()2067 …Frequency = Clock_Ip_apfFreqTableClkSrc[((IP_MC_CGM_2->MUX_0_CSS & MC_CGM_MUX_0_CSS_SELSTAT_MASK)… in Clock_Ip_Get_P2_SYS_DIV2_CLK_Frequency()2076 …Frequency = Clock_Ip_apfFreqTableClkSrc[((IP_MC_CGM_2->MUX_0_CSS & MC_CGM_MUX_0_CSS_SELSTAT_MASK)… in Clock_Ip_Get_P2_SYS_DIV4_CLK_Frequency()2175 …Frequency = Clock_Ip_apfFreqTableClkSrc[((IP_MC_CGM_2->MUX_3_CSS & MC_CGM_MUX_3_CSS_SELSTAT_MASK)… in Clock_Ip_Get_P2_MATH_CLK_Frequency()2183 …Frequency = Clock_Ip_apfFreqTableClkSrc[((IP_MC_CGM_2->MUX_3_CSS & MC_CGM_MUX_3_CSS_SELSTAT_MASK)… in Clock_Ip_Get_P2_MATH_DIV3_CLK_Frequency()
2654 (Clock_Ip_CgmMuxType*)(&IP_MC_CGM_2->MUX_0_CSC),2655 (Clock_Ip_CgmMuxType*)(&IP_MC_CGM_2->MUX_1_CSC),2656 (Clock_Ip_CgmMuxType*)(&IP_MC_CGM_2->MUX_2_CSC),2657 (Clock_Ip_CgmMuxType*)(&IP_MC_CGM_2->MUX_3_CSC),2803 (volatile Clock_Ip_CgmPcfsType*)(&(IP_MC_CGM_2->PCFS_SDUR)),
201 #define IP_MC_CGM_2 ((MC_CGM_Type *)IP_MC_CGM_2_BASE) macro221 #define IP_MC_CGM_BASE_PTRS { IP_MC_CGM_0, IP_MC_CGM_1, IP_MC_CGM_2, IP_MC_CGM…
