Searched refs:IP_GPR5_PCTL (Results 1 – 2 of 2) sorted by relevance
89 #define IP_GPR5_PCTL ((GPR5_PCTL_Type *)IP_GPR5_PCTL_BASE) macro93 #define IP_GPR5_PCTL_BASE_PTRS { IP_GPR5_PCTL }
1777 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->LIN9PCTL & GPR5_PCTL_LIN9PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_LIN9_CLK_Frequency()1787 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->LIN10PCTL & GPR5_PCTL_LIN10PCTL_PCTL_MASK) >> … in Clock_Ip_Get_LIN10_CLK_Frequency()1797 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->LIN11PCTL & GPR5_PCTL_LIN11PCTL_PCTL_MASK) >> … in Clock_Ip_Get_LIN11_CLK_Frequency()1989 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->DSPI8PCTL & GPR5_PCTL_DSPI8PCTL_PCTL_MASK) >> … in Clock_Ip_Get_SPI8_CLK_Frequency()1998 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->DSPI9PCTL & GPR5_PCTL_DSPI9PCTL_PCTL_MASK) >> … in Clock_Ip_Get_SPI9_CLK_Frequency()2419 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->EDMA5PCTL & GPR5_PCTL_EDMA5PCTL_PCTL_1_MASK) >… in Clock_Ip_Get_DMACRC5_CLK_Frequency()2462 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->EDMA5PCTL & GPR5_PCTL_EDMA5PCTL_PCTL_2_MASK) >… in Clock_Ip_Get_DMAMUX5_CLK_Frequency()2603 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->EDMA5PCTL & GPR5_PCTL_EDMA5PCTL_PCTL_0_MASK) >… in Clock_Ip_Get_EDMA5_CLK_Frequency()3728 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->EDMA5PCTL & GPR5_PCTL_EDMA5PCTL_PCTL_3_MASK) >… in Clock_Ip_Get_PIT5_CLK_Frequency()3901 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR5_PCTL->SIUL5PCTL & GPR5_PCTL_SIUL5PCTL_PCTL_MASK) >> … in Clock_Ip_Get_SIUL2_5_CLK_Frequency()
