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Searched refs:GPR1_PCTL_EDMA1PCTL_PCTL_2_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR1_PCTL.h134 #define GPR1_PCTL_EDMA1PCTL_PCTL_2_MASK (0x4U) macro
137 …(uint32_t)(((uint32_t)(x)) << GPR1_PCTL_EDMA1PCTL_PCTL_2_SHIFT)) & GPR1_PCTL_EDMA1PCTL_PCTL_2_MASK)
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c2441 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR1_PCTL->EDMA1PCTL & GPR1_PCTL_EDMA1PCTL_PCTL_2_MASK) >… in Clock_Ip_Get_DMAMUX1_CLK_Frequency()