| /hal_nxp-3.5.0/mcux/mcux-sdk/drivers/dac_1/ |
| D | fsl_dac.h | 366 return base->FSR; in DAC_GetStatusFlags()
377 base->FSR = flags; in DAC_ClearStatusFlags()
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| /hal_nxp-3.5.0/mcux/mcux-sdk/drivers/lpspi/ |
| D | fsl_lpspi.h | 574 return ((base->FSR & LPSPI_FSR_TXCOUNT_MASK) >> LPSPI_FSR_TXCOUNT_SHIFT); in LPSPI_GetTxFifoCount()
584 return ((base->FSR & LPSPI_FSR_RXCOUNT_MASK) >> LPSPI_FSR_RXCOUNT_SHIFT); in LPSPI_GetRxFifoCount()
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| /hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_LPSPI.h | 94 __I uint32_t FSR; /**< FIFO Status, offset: 0x5C */ member
|
| D | S32K344_MU.h | 86 __I uint32_t FSR; /**< Flag Status Register, offset: 0x104 */ member
|
| /hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_MU.h | 86 __I uint32_t FSR; /**< Flag Status Register, offset: 0x104 */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/ |
| D | MKE14Z4.h | 4910 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/ |
| D | MKE15Z4.h | 4911 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/ |
| D | K32L3A60_cm0plus.h | 8872 __IO uint32_t FSR; /**< FIFO Status Register, offset: 0x18 */ member
10500 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| D | K32L3A60_cm4.h | 9507 __IO uint32_t FSR; /**< FIFO Status Register, offset: 0x18 */ member
11135 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/ |
| D | MKE12Z7.h | 7898 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/ |
| D | MKE16Z4.h | 4909 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/ |
| D | MKE13Z7.h | 7900 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/ |
| D | MKE17Z7.h | 7902 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/ |
| D | MKE14Z7.h | 7474 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/ |
| D | MKE15Z7.h | 7476 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/ |
| D | MKE14F16.h | 10082 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/ |
| D | MKE16F16.h | 11081 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/ |
| D | K32L2A31A.h | 8836 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/ |
| D | K32L2A41A.h | 8836 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/ |
| D | MKE18F16.h | 11086 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 22565 __I uint32_t FSR; /**< FIFO Status, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 19527 __I uint32_t FSR; /**< FIFO Status, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | MCIMX7U5_cm4.h | 13420 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | MCIMX7U3_cm4.h | 13419 __I uint32_t FSR; /**< FIFO Status Register, offset: 0x5C */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/ |
| D | LPC5536.h | 28794 __IO uint32_t FSR; /**< FIFO Status Register, offset: 0x18 */ member
|
