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Searched refs:FLSHCR0 (Results 1 – 25 of 80) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/boards/mimxrt685audevk/project_template/
Dboard.c330 if (((base->FLSHCR0[0] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) || in BOARD_InitXip()
331 ((base->FLSHCR0[1] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0)) in BOARD_InitXip()
336 if (((base->FLSHCR0[2] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) || in BOARD_InitXip()
337 ((base->FLSHCR0[3] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0)) in BOARD_InitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/mimxrt685audevk/
Dboard.c330 if (((base->FLSHCR0[0] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) || in BOARD_InitXip()
331 ((base->FLSHCR0[1] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0)) in BOARD_InitXip()
336 if (((base->FLSHCR0[2] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) || in BOARD_InitXip()
337 ((base->FLSHCR0[3] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0)) in BOARD_InitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/project_template/
Dboard.c315 if ((base->FLSHCR0[0] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0 || in BOARD_InitXip()
316 (base->FLSHCR0[1] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) in BOARD_InitXip()
321 if ((base->FLSHCR0[2] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0 || in BOARD_InitXip()
322 (base->FLSHCR0[3] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) in BOARD_InitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt685/
Dboard.c334 if (((base->FLSHCR0[0] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) || in BOARD_InitXip()
335 ((base->FLSHCR0[1] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0)) in BOARD_InitXip()
340 if (((base->FLSHCR0[2] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) || in BOARD_InitXip()
341 ((base->FLSHCR0[3] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0)) in BOARD_InitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt685/project_template/
Dboard.c334 if (((base->FLSHCR0[0] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) || in BOARD_InitXip()
335 ((base->FLSHCR0[1] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0)) in BOARD_InitXip()
340 if (((base->FLSHCR0[2] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0) || in BOARD_InitXip()
341 ((base->FLSHCR0[3] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0)) in BOARD_InitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_power.c658 if (((base->FLSHCR0[0] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0U) || in AT_QUICKACCESS_SECTION_CODE()
659 ((base->FLSHCR0[1] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0U)) in AT_QUICKACCESS_SECTION_CODE()
664 if (((base->FLSHCR0[2] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0U) || in AT_QUICKACCESS_SECTION_CODE()
665 ((base->FLSHCR0[3] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0U)) in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_power.c658 if (((base->FLSHCR0[0] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0U) || in AT_QUICKACCESS_SECTION_CODE()
659 ((base->FLSHCR0[1] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0U)) in AT_QUICKACCESS_SECTION_CODE()
664 if (((base->FLSHCR0[2] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0U) || in AT_QUICKACCESS_SECTION_CODE()
665 ((base->FLSHCR0[3] & FLEXSPI_FLSHCR0_FLSHSZ_MASK) > 0U)) in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/flexspi/
Dfsl_flexspi.c349 base->FLSHCR0[i] = 0; in FLEXSPI_Init()
503 base->FLSHCR0[port] = config->flashSize | FLEXSPI_FLSHCR0_ADDRSHIFT(config->addressShift); in FLEXSPI_SetFlashConfig()
505 base->FLSHCR0[port] = config->flashSize; in FLEXSPI_SetFlashConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h7254 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
DMIMXRT685S_cm33.h13356 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h16111 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h13512 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h13356 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h12306 …__IO uint32_t FLSHCR0[2]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h12992 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h12306 …__IO uint32_t FLSHCR0[2]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h19573 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h19557 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h21857 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h20525 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h19586 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h21310 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h22235 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h21859 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h23021 …__IO uint32_t FLSHCR0[4]; /**< Flash Control Register 0, array offset: 0x60… member

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