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Searched refs:DPU_COMCTRL_OFFSET (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/dpu/
Dfsl_dpu.c1259 ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->INTERRUPTENABLE[group] |= mask; in DPU_EnableInterrupts()
1284 ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->INTERRUPTENABLE[group] &= ~mask; in DPU_DisableInterrupts()
1300 return ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->INTERRUPTSTATUS[group]; in DPU_GetInterruptsPendingFlags()
1325 ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->INTERRUPTCLEAR[group] = mask; in DPU_ClearInterruptsPendingFlags()
1345 ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->INTERRUPTPRESET[group] = mask; in DPU_SetInterruptsPendingFlags()
1364 ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->USERINTERRUPTMASK[group] = mask; in DPU_MaskUserInterrupts()
1382 ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->USERINTERRUPTENABLE[group] |= mask; in DPU_EnableUserInterrupts()
1400 … ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->USERINTERRUPTENABLE[group] &= ~mask; in DPU_DisableUserInterrupts()
1417 return ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->USERINTERRUPTSTATUS[group]; in DPU_GetUserInterruptsPendingFlags()
1435 ((DPU_COMCTRL_Type *)((uint32_t)base + DPU_COMCTRL_OFFSET))->USERINTERRUPTCLEAR[group] = mask; in DPU_ClearUserInterruptsPendingFlags()
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Dfsl_dpu.h160 #define DPU_COMCTRL_OFFSET 0x0000U macro