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Searched refs:DMA0_TRIG9_PIO1_7 (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-3.5.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h1116 #define DMA0_TRIG9_PIO1_7 IOCON_MUX(39, IOCON_TYPE_D, 0) /* PIO1_7 */ macro
DLPC54114J256UK49-pinctrl.h1269 #define DMA0_TRIG9_PIO1_7 IOCON_MUX(39, IOCON_TYPE_D, 0) /* PIO1_7 */ macro
DLPC51U68JBD64-pinctrl.h1175 #define DMA0_TRIG9_PIO1_7 IOCON_MUX(39, IOCON_TYPE_D, 0) /* PIO1_7 */ macro
DLPC54114J256BD64-pinctrl.h1337 #define DMA0_TRIG9_PIO1_7 IOCON_MUX(39, IOCON_TYPE_D, 0) /* PIO1_7 */ macro
/hal_nxp-3.5.0/dts/nxp/nxp_imx/rt/
DMIMXRT595SFAWC-pinctrl.h3504 #define DMA0_TRIG9_PIO1_7 IOPCTL_MUX(39, 0) /* PIO1_7 */ macro
DMIMXRT595SFFOC-pinctrl.h3506 #define DMA0_TRIG9_PIO1_7 IOPCTL_MUX(39, 0) /* PIO1_7 */ macro
DMIMXRT685SFFOB-pinctrl.h3520 #define DMA0_TRIG9_PIO1_7 IOPCTL_MUX(39, 0) /* PIO1_7 */ macro
DMIMXRT685SFVKB-pinctrl.h3520 #define DMA0_TRIG9_PIO1_7 IOPCTL_MUX(39, 0) /* PIO1_7 */ macro