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Searched refs:DMA0_TRIG7_PIO0_9 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.5.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h253 #define DMA0_TRIG7_PIO0_9 IOCON_MUX(9, IOCON_TYPE_D, 0) /* PIO0_9 */ macro
DLPC54114J256UK49-pinctrl.h282 #define DMA0_TRIG7_PIO0_9 IOCON_MUX(9, IOCON_TYPE_D, 0) /* PIO0_9 */ macro
DLPC51U68JBD64-pinctrl.h312 #define DMA0_TRIG7_PIO0_9 IOCON_MUX(9, IOCON_TYPE_D, 0) /* PIO0_9 */ macro
DLPC54114J256BD64-pinctrl.h350 #define DMA0_TRIG7_PIO0_9 IOCON_MUX(9, IOCON_TYPE_D, 0) /* PIO0_9 */ macro
/hal_nxp-3.5.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h830 #define DMA0_TRIG7_PIO0_9 IOPCTL_MUX(9, 0) /* PIO0_9 */ macro
DMIMXRT595SFAWC-pinctrl.h970 #define DMA0_TRIG7_PIO0_9 IOPCTL_MUX(9, 0) /* PIO0_9 */ macro
DMIMXRT595SFFOC-pinctrl.h972 #define DMA0_TRIG7_PIO0_9 IOPCTL_MUX(9, 0) /* PIO0_9 */ macro
DMIMXRT685SFFOB-pinctrl.h832 #define DMA0_TRIG7_PIO0_9 IOPCTL_MUX(9, 0) /* PIO0_9 */ macro
DMIMXRT685SFVKB-pinctrl.h832 #define DMA0_TRIG7_PIO0_9 IOPCTL_MUX(9, 0) /* PIO0_9 */ macro