/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/lpadc/ |
D | fsl_lpadc.h | 748 base->DE |= ADC_DE_FWMDE0_MASK; in LPADC_EnableFIFO0WatermarkDMA() 752 base->DE &= ~ADC_DE_FWMDE0_MASK; in LPADC_EnableFIFO0WatermarkDMA() 766 base->DE |= ADC_DE_FWMDE1_MASK; in LPADC_EnableFIFO1WatermarkDMA() 770 base->DE &= ~ADC_DE_FWMDE1_MASK; in LPADC_EnableFIFO1WatermarkDMA() 784 base->DE |= ADC_DE_FWMDE_MASK; in LPADC_EnableFIFOWatermarkDMA() 788 base->DE &= ~ADC_DE_FWMDE_MASK; in LPADC_EnableFIFOWatermarkDMA()
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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/llwu/ |
D | fsl_llwu.h | 262 base->DE |= LLWU_REG_VAL(1UL << moduleIndex); in LLWU_EnableInternalModuleDmaRequestWakup() 266 base->DE &= LLWU_REG_VAL(~(1UL << moduleIndex)); in LLWU_EnableInternalModuleDmaRequestWakup()
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/ |
D | K32L3A60_cm0plus.h | 624 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member 7148 …__IO uint32_t DE; /**< Module DMA/Trigger Enable register, offset: … member
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D | K32L3A60_cm4.h | 661 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member 7783 …__IO uint32_t DE; /**< Module DMA/Trigger Enable register, offset: … member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/ |
D | K32L2A31A.h | 6486 __IO uint32_t DE; /**< LLWU Module DMA Enable register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/ |
D | K32L2A41A.h | 6486 __IO uint32_t DE; /**< LLWU Module DMA Enable register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 1267 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member 10889 …__I uint32_t DE; /**< Module DMA/Trigger Enable register, offset: … member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 1266 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member 10888 …__I uint32_t DE; /**< Module DMA/Trigger Enable register, offset: … member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/ |
D | LPC5506CPXXXX.h | 285 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/ |
D | LPC5502.h | 289 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506/ |
D | LPC5506.h | 289 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/ |
D | LPC5504CPXXXX.h | 285 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/ |
D | LPC5502CPXXXX.h | 285 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504/ |
D | LPC5504.h | 289 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5512/ |
D | LPC5512.h | 291 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5528/ |
D | LPC5528.h | 291 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S04/ |
D | LPC55S04.h | 291 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S06/ |
D | LPC55S06.h | 291 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5526/ |
D | LPC5526.h | 291 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S28/ |
D | LPC55S28.h | 293 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S26/ |
D | LPC55S26.h | 293 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S16/ |
D | LPC55S16.h | 295 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S14/ |
D | LPC55S14.h | 294 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5514/ |
D | LPC5514.h | 292 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S66/ |
D | LPC55S66_cm33_core1.h | 293 __IO uint32_t DE; /**< DMA Enable Register, offset: 0x1C */ member
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