Searched refs:DCDC (Results 1 – 13 of 13) sorted by relevance
/Zephyr-latest/drivers/regulator/ |
D | regulator_da1469x.c | 113 .dcdc_register = &DCDC->DCDC_VDD_REG, 137 .dcdc_register = &DCDC->DCDC_V14_REG, 148 .dcdc_register = &DCDC->DCDC_V18_REG, 159 .dcdc_register = &DCDC->DCDC_V18P_REG, 217 if (((DCDC->DCDC_CTRL1_REG & DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk) == 0) && in regulator_da1469x_enable() 220 DCDC->DCDC_CTRL1_REG |= DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk; in regulator_da1469x_enable() 221 dcdc_state.ctrl1 = DCDC->DCDC_CTRL1_REG; in regulator_da1469x_enable() 245 if ((DCDC->DCDC_CTRL1_REG & DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk) && in regulator_da1469x_disable() 246 (DCDC->DCDC_VDD_REG & DCDC_REQUESTED) == 0 && in regulator_da1469x_disable() 247 (DCDC->DCDC_V14_REG & DCDC_REQUESTED) == 0 && in regulator_da1469x_disable() [all …]
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/Zephyr-latest/soc/nxp/imxrt/imxrt10xx/ |
D | power.c | 154 DCDC_AdjustRunTargetVoltage(DCDC, 0xB); in lpm_drop_voltage() 177 DCDC_AdjustRunTargetVoltage(DCDC, 0x13); in lpm_raise_voltage() 261 DCDC_BootIntoDCM(DCDC); in rt10xx_power_init() 263 DCDC_AdjustLowPowerTargetVoltage(DCDC, 0x1); in rt10xx_power_init() 267 DCDC_SetInternalRegulatorConfig(DCDC, ®_config); in rt10xx_power_init()
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D | soc.c | 156 DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(CONFIG_DCDC_VALUE); in clock_init() 159 (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) { in clock_init()
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/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/ |
D | power.c | 216 DCDC_BootIntoDCM(DCDC); in dcdc_init() 227 DCDC_SetPointInit(DCDC, &dcdc_setpoint_config); in dcdc_init() 231 DCDC_Init(DCDC, &dcdc_config); in dcdc_init() 326 DCDC_SetVDD1P0BuckModeTargetVoltage(DCDC, kDCDC_1P0BuckTarget1P0V); in rt11xx_power_init()
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D | Kconfig | 75 bool "Adjust internal DCDC output"
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D | soc.c | 168 DCDC_SetVDD1P0BuckModeTargetVoltage(DCDC, kDCDC_1P0BuckTarget1P15V); in clock_init()
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/Zephyr-latest/soc/nxp/imxrt/imxrt118x/ |
D | soc.c | 116 DCDC_SetVDD1P0BuckModeTargetVoltage(DCDC, kDCDC_CORE0, kDCDC_1P0Target1P1V); in clock_init() 117 DCDC_SetVDD1P0BuckModeTargetVoltage(DCDC, kDCDC_CORE1, kDCDC_1P0Target1P1V); in clock_init()
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/Zephyr-latest/soc/nxp/imxrt/ |
D | Kconfig | 139 hex "DCDC value for VDD_SOC"
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/Zephyr-latest/boards/m5stack/m5stack_stamps3/doc/ |
D | index.rst | 104 features a DCDC (MUN3CAD01-SC) to generate the 3.3V needed for the MCU.
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/Zephyr-latest/boards/phytec/reel_board/doc/ |
D | index.rst | 397 In addition, it includes a NOTM.2 connector and more powerful DCDC converter 465 link board BASE is powered from USB connector (via DCDC converter).
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/Zephyr-latest/modules/ |
D | Kconfig.mcux | 175 Set if the DCDC converter module is present in the SoC.
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/Zephyr-latest/doc/releases/ |
D | release-notes-3.6.rst | 570 * Added LDO/DCDC support for :dtcompatible:`renesas,smartbond-regulator`.
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D | release-notes-4.0.rst | 256 * Silabs Series 2: Use oscillator, clock and DCDC configuration from device tree during init.
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