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Searched refs:Clock_Ip_apxLfastPll (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Pll.c386 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR |= LFAST_PLLCR_SWPOFF(1); in Clock_Ip_ResetLfastPLL()
388 Clock_Ip_apxLfastPll[Instance].PllInstance->MCR &= (~((uint32)LFAST_MCR_DRFEN_MASK)); in Clock_Ip_ResetLfastPLL()
390 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR &= (~((uint32)LFAST_PLLCR_FBDIV_MASK)); in Clock_Ip_ResetLfastPLL()
392 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR &= (~((uint32)LFAST_PLLCR_PREDIV_MASK)); in Clock_Ip_ResetLfastPLL()
394 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR &= (~((uint32)LFAST_PLLCR_FDIVEN_MASK)); in Clock_Ip_ResetLfastPLL()
404 Clock_Ip_apxLfastPll[Instance].PllInstance->MCR &= (~((uint32)LFAST_MCR_DRFEN_MASK)); in Clock_Ip_SetLfastPLL()
406 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR &= (~((uint32)LFAST_PLLCR_FBDIV_MASK)); in Clock_Ip_SetLfastPLL()
407 … Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR |= LFAST_PLLCR_FBDIV(Config->MulFactorDiv); in Clock_Ip_SetLfastPLL()
409 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR &= (~((uint32)LFAST_PLLCR_PREDIV_MASK)); in Clock_Ip_SetLfastPLL()
410 …Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR |= LFAST_PLLCR_PREDIV((uint8)(Config->Predivider… in Clock_Ip_SetLfastPLL()
[all …]
DClock_Ip_Data.c2896 Clock_Ip_LfastPllType const Clock_Ip_apxLfastPll[CLOCK_IP_LFASTPLL_INSTANCES_ARRAY_SIZE] = variable
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Specific.h308 extern Clock_Ip_LfastPllType const Clock_Ip_apxLfastPll[CLOCK_IP_LFASTPLL_INSTANCES_ARRAY_SIZE];