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Searched refs:Clock_Ip_apxCmu (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Monitor.c454 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_GetInterruptStatus()
477 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
483 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
491 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
502 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
DClock_Ip_Data.c3426 Clock_Ip_ClockMonitorType* const Clock_Ip_apxCmu[CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE] = variable
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Monitor.c473 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_GetInterruptStatus()
498 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
500 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
508 Clock_Ip_apxCmu[IndexCmu]->SR = CmuIsrValue; in Clock_Ip_CMU_ClockFailInt()
DClock_Ip_Data.c2910 Clock_Ip_ClockMonitorType* const Clock_Ip_apxCmu[CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE] = variable
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Specific.h310 extern Clock_Ip_ClockMonitorType * const Clock_Ip_apxCmu[CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE];
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Specific.h459 extern Clock_Ip_ClockMonitorType * const Clock_Ip_apxCmu[CLOCK_IP_CMU_INSTANCES_ARRAY_SIZE];