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Searched refs:CLOCK_IP_SELECTOR_INDEX (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Selector.c157 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ResetCgmXCscCssClkswSwip()
191 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXCscCssClkswSwip()
288 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ResetCgmXCscCssClkswRampupRampdownSwip()
323 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip()
430 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ResetCgmXCscCssCsGrip()
495 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXCscCssCsGrip()
DClock_Ip_DividerTrigger.c133 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
167 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat()
DClock_Ip_Divider.c155 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXDeDivStatWithoutPhase()
DClock_Ip.c667 (void)CLOCK_IP_SELECTOR_INDEX; in Clock_Ip_Init()
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Selector.c153 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ResetCgmXCscCssClkswSwip()
166 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXCscCssClkswSwip()
247 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ResetCgmXCscCssCsGrip()
284 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXCscCssCsGrip()
351 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetGprXClkoutSelMuxsel()
DClock_Ip_DividerTrigger.c128 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
144 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat()
DClock_Ip_Divider.c137 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXDeDivStatWithoutPhase()
208 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXDeDivStatWithoutPhaseWithTrigger()
DClock_Ip.c654 (void)CLOCK_IP_SELECTOR_INDEX; in Clock_Ip_Init()
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Private.h173 #define CLOCK_IP_SELECTOR_INDEX 4U /* Selector index. */ macro
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Private.h173 #define CLOCK_IP_SELECTOR_INDEX 4U /* Selector index. */ macro