CLOCK_IP_HAS_QSPI0_RAM_CLK (reference) in projects: hal_nxp-3.5.0

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Searched refs:CLOCK_IP_HAS_QSPI0_RAM_CLK (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-3.5.0/s32/soc/s32k344/include/
D	Clock_Ip_Cfg_Defines.h	`339 #define CLOCK_IP_HAS_QSPI0_RAM_CLK 122U macro`
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
D	Clock_Ip_Types.h	`2042 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK) 2043 QSPI0_RAM_CLK = CLOCK_IP_HAS_QSPI0_RAM_CLK,`
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
D	Clock_Ip_Types.h	`1958 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK) 1959 QSPI0_RAM_CLK = CLOCK_IP_HAS_QSPI0_RAM_CLK,`
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
D	Clock_Ip_Frequency.c	`687 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK) 1515 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK) 3450 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK)`
D	Clock_Ip_Data.c	`793 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK) 1601 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK) 2314 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK) 3180 #if defined(CLOCK_IP_HAS_QSPI0_RAM_CLK)`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
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babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
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babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
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babblesim_ext_2G4_device_playback-3.7.0
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babblesim_ext_2G4_libPhyComv1-3.7.0
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