Searched refs:ADC2 (Results 1 – 13 of 13) sorted by relevance
| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/ |
| D | g4_i2c1_hsi_adc1_pllp.overlay | 70 /* changes clock source for both ADC1 and ADC2 */
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| /Zephyr-latest/boards/particle/argon/dts/ |
| D | mesh_feather.dtsi | 91 <17 0 &gpio0 28 0>, /* ADC2 = AIN4 */
121 <2 0 &gpio0 28 0>, /* ADC2 = AIN4 */
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| /Zephyr-latest/boards/particle/boron/dts/ |
| D | mesh_feather.dtsi | 91 <17 0 &gpio0 28 0>, /* ADC2 = AIN4 */
121 <2 0 &gpio0 28 0>, /* ADC2 = AIN4 */
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| /Zephyr-latest/boards/particle/xenon/dts/ |
| D | mesh_feather.dtsi | 91 <17 0 &gpio0 28 0>, /* ADC2 = AIN4 */
121 <2 0 &gpio0 28 0>, /* ADC2 = AIN4 */
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_rt1015.dtsi | 54 /* Remove ADC2, it doesn't exist on RT1015 */
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| D | nxp_rt1010.dtsi | 185 /* Remove ADC2, it doesn't exist on RT1010 */
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| /Zephyr-latest/boards/sparkfun/thing_plus/ |
| D | sparkfun_thing_plus_nrf9160_common.dtsi | 88 <2 0 &gpio0 15 0>, /* ADC2 = AIN4 */
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| /Zephyr-latest/boards/circuitdojo/feather/ |
| D | circuitdojo_feather_nrf9160_common.dtsi | 80 <2 0 &gpio0 15 0>, /* ADC2 = AIN4 */
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| /Zephyr-latest/boards/st/stm32u5a9j_dk/doc/ |
| D | index.rst | 113 - ADC2 : channel9 PA4
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| /Zephyr-latest/drivers/adc/ |
| D | adc_stm32.c | 581 } else if (adc == ADC2) { in adc_stm32_calibrate()
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-3.6.rst | 299 which has 5 ADCs, ADC1 and ADC2 share one IRQ while ADC3, ADC4 and ADC5 each have unique IRQs).
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| D | release-notes-3.0.rst | 1233 * :github:`39797` - STM32 G4 series compile error when both ADC1 and ADC2 are opened
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| D | release-notes-4.0.rst | 438 * Added proper ADC2 calibration entries in ESP32.
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