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Searched refs:ADC0PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR0_PCTL.h86 __IO uint32_t ADC0PCTL; /**< ADC_0 Clock Control Enable, offset: 0x34 */ member
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c2302 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->ADC0PCTL & GPR0_PCTL_ADC0PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_ADC0_CLK_Frequency()