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Searched refs:SCGC5 (Results 1 – 22 of 22) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dsystem_MKW22D5.c87 SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK; /* Ungate PORTB and PORTC clock*/ in ExtClk_Setup_HookUp()
DMKW22D5.h6413 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dsystem_MKW24D5.c87 SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK; /* Ungate PORTB and PORTC clock*/ in ExtClk_Setup_HookUp()
DMKW24D5.h6413 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
Dsystem_MKW30Z4.c101 SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK; in SystemInit()
DMKW30Z4.h6791 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
6825 #define SIM_SCGC5_REG(base) ((base)->SCGC5)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
Dsystem_MKW20Z4.c101 SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK; in SystemInit()
DMKW20Z4.h6791 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
6825 #define SIM_SCGC5_REG(base) ((base)->SCGC5)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
Dsystem_MKW40Z4.c101 SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK; in SystemInit()
DMKW40Z4.h6791 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
6825 #define SIM_SCGC5_REG(base) ((base)->SCGC5)
/hal_nxp-2.7.6/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/
Dfsl_xcvr.c383 SIM->SCGC5 |= SIM_SCGC5_PHYDIG_MASK; in XCVR_Init()
536 SIM->SCGC5 |= mode_config->scgc5_clock_ena_bits; in XCVR_Configure()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3631 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h11423 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h6282 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h21023 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h6211 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h6282 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h18911 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h21373 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h20251 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h22346 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h21349 …__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offs… member