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Searched refs:MCG_S_CLKST_MASK (Results 1 – 25 of 31) sorted by relevance

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/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
Dsystem_MKW30Z4.c192 while((MCG->S & MCG_S_CLKST_MASK) != 0x00U) { /* Wait until output of the FLL is selected */ in SystemInit()
195 …while((MCG->S & MCG_S_CLKST_MASK) != 0x04U) { /* Wait until internal reference clock is selected a… in SystemInit()
198 …while((MCG->S & MCG_S_CLKST_MASK) != 0x08U) { /* Wait until external reference clock is selected a… in SystemInit()
DMKW30Z4.h4455 #define MCG_S_CLKST_MASK 0xCu macro
4458 …LKST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_CLKST_SHIFT))&MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
Dsystem_MKW20Z4.c192 while((MCG->S & MCG_S_CLKST_MASK) != 0x00U) { /* Wait until output of the FLL is selected */ in SystemInit()
195 …while((MCG->S & MCG_S_CLKST_MASK) != 0x04U) { /* Wait until internal reference clock is selected a… in SystemInit()
198 …while((MCG->S & MCG_S_CLKST_MASK) != 0x08U) { /* Wait until external reference clock is selected a… in SystemInit()
DMKW20Z4.h4455 #define MCG_S_CLKST_MASK 0xCu macro
4458 …LKST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_CLKST_SHIFT))&MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
Dsystem_MKW40Z4.c192 while((MCG->S & MCG_S_CLKST_MASK) != 0x00U) { /* Wait until output of the FLL is selected */ in SystemInit()
195 …while((MCG->S & MCG_S_CLKST_MASK) != 0x04U) { /* Wait until internal reference clock is selected a… in SystemInit()
198 …while((MCG->S & MCG_S_CLKST_MASK) != 0x08U) { /* Wait until external reference clock is selected a… in SystemInit()
DMKW40Z4.h4455 #define MCG_S_CLKST_MASK 0xCu macro
4458 …LKST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_CLKST_SHIFT))&MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
Dfsl_clock.c68 #define MCG_S_CLKST_VAL ((MCG->S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT)
1392 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
1536 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
DMKL25Z4.h2110 #define MCG_S_CLKST_MASK (0xCU) macro
2112 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_CLKST_SHIFT)) & MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dfsl_clock.c68 #define MCG_S_CLKST_VAL ((MCG->S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT)
1477 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
1622 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
DMKW22D5.h4865 #define MCG_S_CLKST_MASK (0xCU) macro
4867 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_CLKST_SHIFT)) & MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dfsl_clock.c68 #define MCG_S_CLKST_VAL ((MCG->S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT)
1477 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
1622 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
DMKW24D5.h4865 #define MCG_S_CLKST_MASK (0xCU) macro
4867 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_CLKST_SHIFT)) & MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
Dfsl_clock.c50 #define MCG_S_CLKST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_CLKST_MASK) >> (uint32_t)MCG_S_CLKST_S…
1798 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
2040 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
Dfsl_clock.c50 #define MCG_S_CLKST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_CLKST_MASK) >> (uint32_t)MCG_S_CLKST_S…
1798 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
2040 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
Dfsl_clock.c50 #define MCG_S_CLKST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_CLKST_MASK) >> (uint32_t)MCG_S_CLKST_S…
1942 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
2185 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
DMK22F51212.h8904 #define MCG_S_CLKST_MASK (0xCU) macro
8912 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_CLKST_SHIFT)) & MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
Dfsl_clock.c50 #define MCG_S_CLKST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_CLKST_MASK) >> (uint32_t)MCG_S_CLKST_S…
1909 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
2152 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
DMK64F12.h16804 #define MCG_S_CLKST_MASK (0xCU) macro
16812 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_CLKST_SHIFT)) & MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
Dfsl_clock.c50 #define MCG_S_CLKST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_CLKST_MASK) >> (uint32_t)MCG_S_CLKST_S…
1951 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
2194 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
Dfsl_clock.c50 #define MCG_S_CLKST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_CLKST_MASK) >> (uint32_t)MCG_S_CLKST_S…
1951 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
2194 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
Dfsl_clock.c96 #define MCG_S_CLKST_VAL ((MCG->S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT)
1303 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
DMKW41Z4.h4403 #define MCG_S_CLKST_MASK (0xCU) macro
4405 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_CLKST_SHIFT)) & MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
Dfsl_clock.c50 #define MCG_S_CLKST_VAL (((uint32_t)MCG->S & (uint32_t)MCG_S_CLKST_MASK) >> (uint32_t)MCG_S_CLKST_S…
2223 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
2472 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h4403 #define MCG_S_CLKST_MASK (0xCU) macro
4405 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_CLKST_SHIFT)) & MCG_S_CLKST_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h4332 #define MCG_S_CLKST_MASK (0xCU) macro
4334 …(x) (((uint8_t)(((uint8_t)(x)) << MCG_S_CLKST_SHIFT)) & MCG_S_CLKST_MASK)

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