Searched refs:u32NF (Results 1 – 3 of 3) sorted by relevance
| /hal_nuvoton-latest/m46x/StdDriver/src/ |
| D | clk.c | 1043 uint32_t u32PllSrcClk, u32NR, u32NF, u32NO, u32PllClk; in CLK_EnablePLL() local
1117 …for(u32NF = 2UL; u32NF <= 513UL; u32NF++) /* NF = 2~513 since NF = FBDIV+2 and FBDIV = 0~511… in CLK_EnablePLL()
1119 … u32Tmp2 = (u32Tmp * u32NF) << 1; /* FVCO = FREF*2*NF */ in CLK_EnablePLL()
1127 u32MinNF = u32NF; in CLK_EnablePLL()
1404 uint32_t u32FIN, u32NF, u32NR, u32NO; in CLK_GetPLLClockFreq() local
1434 u32NF = ((u32PllReg & CLK_PLLCTL_FBDIV_Msk) >> CLK_PLLCTL_FBDIV_Pos) + 2UL; in CLK_GetPLLClockFreq()
1438 u32PllFreq = (((u32FIN >> 2) * (u32NF << 1)) / (u32NR * u32NO) << 2); in CLK_GetPLLClockFreq()
1639 uint32_t u32NR = 0UL, u32NF = 0UL, u32NO, u32X = 0UL; in CLK_EnablePLLFN() local
1702 u32NF = (uint32_t)fNX_X; in CLK_EnablePLLFN()
1704 if((u32NF >= 12) && (u32NF <= 255)) /* Constraint 4: 12<= NF <= 255. */ in CLK_EnablePLLFN()
[all …]
|
| /hal_nuvoton-latest/m48x/StdDriver/src/ |
| D | clk.c | 792 uint32_t u32PllSrcClk, u32NR, u32NF, u32NO, u32CLK_SRC, u32PllClk; in CLK_EnablePLL() local
876 for(u32NF = 2UL; u32NF <= 513UL; u32NF++) in CLK_EnablePLL()
879 u32Tmp2 = (((u32Tmp * 2UL) >> 2) * u32NF); in CLK_EnablePLL()
888 u32MinNF = u32NF; in CLK_EnablePLL()
1191 uint32_t u32FIN, u32NF, u32NR, u32NO; in CLK_GetPLLClockFreq() local
1225 u32NF = ((u32PllReg & CLK_PLLCTL_FBDIV_Msk) >> CLK_PLLCTL_FBDIV_Pos) + 2UL; in CLK_GetPLLClockFreq()
1229 u32PllFreq = (((u32FIN >> 2) * u32NF) / (u32NR * u32NO) << 2) * 2UL; in CLK_GetPLLClockFreq()
|
| /hal_nuvoton-latest/m2l31x/StdDriver/src/ |
| D | clk.c | 980 uint32_t u32PllSrcClk, u32NR, u32NF, u32NO, u32CLK_SRC, u32Outdiv; in CLK_EnablePLL() local
1064 for(u32NF = 12; u32NF <= 255; u32NF++) /* NF = 12~255 and NF = FBDIV + 2 */ in CLK_EnablePLL()
1066 u32Fvco = u32Fref * 2 * u32NF; /* FVCO = FIN * 2 * (NF.x) / NR */ in CLK_EnablePLL()
1077 u32MinNF = u32NF; in CLK_EnablePLL()
1349 uint32_t u32FIN, u32NF, u32NR, u32NO; in CLK_GetPLLClockFreq() local
1384 u32NF = ((u32Pll2Reg & CLK_PLLCTL2_FBDIV_Msk) >> CLK_PLLCTL2_FBDIV_Pos) + 2UL; in CLK_GetPLLClockFreq()
1389 u32PllFreq = (((u32FIN >> 2) * u32NF) / (u32NR * u32NO) << 2) * 2UL; in CLK_GetPLLClockFreq()
|
